Index

#

#define 1.5, 3.3

#include 1.5, 1

% 1.5, 1

& 2.10

* 2.10

+= 1

-> 6.4

.gitignore C

\(\Im(\cdot)\) 8.1

\(\mathcal{F}\{\cdot\}\) 7.3

\(\mathcal{L}\{\cdot\}\) 7.4

\(\mathcal{Z}\{\cdot\}\) 7.4

\(\Re(\cdot)\) 8.1

\(\text{I}^2\text{C}\) 4.5, 4.7

A

Abstraction 1.4

Addressing modes 2.3

Aio_InitCI0() 7.5

Aio_InitCO0() 7.5

Aio_InitCO1() 7.5

Aio_Read() 7.5, 7

Aio_Write() 7.5, 7, 8

Algorithms 1.5, 3.2

analysis of 3.2

order of growth (big-O notation) 3.2

classifying 3.2

correctness of 3.2

earliest due date (EDD) 3.2

efficiency of 3.2

analyzing the 3.2

inputs of

size of 3.2

insertion sort 3.2

instances of 3.2

random-access machines 3.2

run time of 3.2

scheduling 3.2

sorting 3.2

Aliasing 7.3

Amplifiers

analog 5.3, 8.5

current 5.3, 8.5

current limiting protection of 5.3

current-controlled 5.3

digital 5.3

four-quadrant 5.3, 5

heat sinks for 5.3

linear (analog) 5.3

class A 5.3

class AB 5.3

class B 5.3

comparison with switched 5.3

feedback for 5.3

op-amp based 5.3

power booster stage 5.3

power transistor 5.3

quiescent current in 5.3

motor-driving 5.3

kickback 5.3

nonlinearities of 5.3

operational (op-amps) 5.3

bandwidth for 5.3

cutoff frequency for 5.3

dynamic effects of 5.3

full power bandwidth for 5.3

power 5.3

rise time for 5.3

settling time for 5.3

power sinking 5.3

power supplies for 5.3

pulse-frequency modulation (PFM) 5.3

pulse-width modulation (PWM) 5.3, 5, 5

duty cycle 5.3, 5

push-pull 5.3

crossover distortion in 5.3

switched, pulse-controlled 5.3

comparison with linear 5.3

DC gain 5.3

frequency response 5.3

H-bridge circuits for 5.3

regenerative braking 5.3

voltage 5.3, 8.5

voltage limiting protection of 5.3

voltage-controlled 5.3

Amplitude-shift keying (ASK) 4.1

Analog inputs and outputs (AIO) 7.5

accuracy 7.5

differential input 7.5

input impedance 7.5

sampling rate 7.5

single-ended input 7.5

voltage range 7.5

Analog signals 4.2, 7

Analog-to-digital conversion 7.1, 7.5, 7, 8.4

aperture time 7.1

converter transfer function 7.1

inferred voltage 7.1

input range 7.1

quantization error 7.1

RMS value 7.1

quantization size, Q 7.1

resolution 7.1

Anti-aliasing filter 7.3

Application binary interface (ABI) 6.1

Application programming interface (API) 6.1

Application-level programming 2.3

Applications software 6.1

Arithmetic logic units (ALUs) 2.1

ARM emulator tool 2.6

ARM instruction set architectures 2.1, 2.3, 2.6

assembly language 2.6

ASCII character codes 2.5, 2.10, 2, 4

Assembler 1.4, 6.1

Assembly language 1.4

ARM 2.6

Automatic tuning of controllers 9.5

B

Back EMF 5.3

Bandwidth 8.4, 9.5

rise time and 9.5

Base set of controller gains 8.6

Baseband signal 4.1

Basic displacement increment (BDI) 5

Basic time interval (BTI) 5.4, 5, 7.6, 8

Big-endian 2.3

Binary coded decimal (BCD) representation 2.5

Biquad cascade 7.4, 7

Bits 2.1

Boolean algebra 6.5

sequential logic in 6.5

asynchronous 6.5

synchronous 6.5

break 1.5

Buffer pointer 3

Buffered getchar() 3

Buses 2.1, 4.4

IEEE-488 (GPIB) 6.6

Butterworth filter 7

Bytes 2.1

C

C programming language 1.4

argument passing

by-value 2.10

arrays 1.5

memory allocation for 1.5

multidimensional 4.11

number of elements in 2.10

pointers to 2.10

subscripts/indices of 1.5

treated as pointers 2.10

buffers 3.3

casting 2.10

comments 1.5

compiling the 1.4

preprocessors for 3.3

control-flow statements 1.5

declarations 1.5

expressions 1.5

fixed-width integer types 1.6

function prototypes 1.5

functions 1.5

getting started with the 1.5

global variables 1.5

header files 1.5

identifiers 3.3

declaring 3.3

defining 3.3

external (global) 3.3

initializing 3.3

scoping 3.3

implicit type conversions 2.10

literals 1.5

float 3.3

unsigned integer 3.3

macros 1.5, 3.3

function-like 3.3

null character 2.10

operands 1.5

operators 1.5

associativity of 3.4

precedence of 3.4

pointers 2.10

and function arguments 2.10

instead of array subscripts 3.3

preprocessor directives 1.5, 3.3

real-time computing 1.4

scoping of identifiers 2.10

standard library 1.5

statements 1.5

storage-class specifiers 3.3

streams 3.3

strings 1.5, 2.10

format tags 1.5

structure tags 4.8

style 1.5

symbolic constants 1.5

types (including standard library) 1.5

exact-width integer 3.3

fastest minimum-width integer 3.3

integer promotion of 3.3

minimum-width integer 3.3

values 1.5

variable argument list macros 2.10

variables 1.5

automatic (local) 3.3

external (global) 3.3

whitespace in the 1.5

C standard library 1.4

c2d() 7.4, 7, 8.4, 8.6, 9.5, 9

Call graphs 2.11

cascade() 2.9, 8, 9

Channel decoding 4.1

Channel encoding 4.1

char 1.5, 2.10, 3.3

Character buffer 3

Character codes 2.5

Character I/O 2

Clarke Sir Arthur C. 4.1

clock() 3.3

clock_t 3.3

CLOCKS_PER_SEC 3.3

Closed-loop transfer function 8.1, 8.2, 8.6, 8

Communication channels 4.1

capacity of 4.1

error-correcting codes for 4.1

filters for modeling 4.1

modeling 4.1

noise of 4.1

parity bits of 4.1

redundancy in 4.1

Communication systems 4

Comparator 7.2

Compensation 8.3

Compilation 1.4, 6.1

Complementary metal-oxide-semiconductor (CMOS) logic families 4.2, 6.6

Bipolar CMOS 6.6

HC(T) 6.6

LVC/LVX 6.6

Computer architectures 2.1

Computer hardware realization 2.2

Computer packaging 2.2

const 3.3

Context switching 6.1

continue 1.5

Continuous signals 7

Continuous-time systems 7.4

Control effort 8.1, 8.4, 8.6, 9.5, 9

Control systems 1.1, 2.8, 8, 8.4

amplifiers of 8.1

control devices for 8.1

control effort of 8.1, 8.4

controllers of 2.8, 8.1

design problem 8.1

error 8.1

history of 2.8

open-loop 5, 5.2

performance of 8.1

plants of 2.8, 8.1

robustness of 8.1

stability performance of 8.1, 8

steady-state performance of 8.1

transient performance of 8.1

Convolution integral 7.3

creating 6.4

ctable2() 8

D

Damped natural frequency 8.1

Damping ratio 8.1

Data 2.1

Data for a program 6.1

Data frames for digital communication 4.4

DC motor 8

Debugger 1.2, 1

Breakpoint 1

Debug Configurations 1

Resume 1

Step Into 1

Step Over 1

Step Return 1

Stepping 1

Variables pane 1

DEL 3

Derivative compensation 9.1

compensator angle 9.1

Design point 8.6

Development system 1.1, 1.2, 1.5

computer 1.1, 1.2

integrated development environment (IDE) 1.1, 1.2, 1.3

compiling in 1.3

debugger 1.2

executing in 1.3

specific 1.2

virtual machine (VM) 1.1, 1.2

diff() 9.5

Difference equation 7.4, 7

Differential equation 7.4

Differential power supplies 5.3

Digital circuits 6.5

flip-flop 6.5

NAND 6.5

nand 6.8

NOR 6.5

memory and 6.5

output stages of 6.6

active pullup 6.6

open-collector 6.6

open-drain 6.6

pulldown resistors for 6.6

pullup resistors for 6.6

push-pull 6.6

propagation delay in 6.5

Digital communication 4, 4.1

asynchronous 4.4

baud rate 4.4

data bits for 4.4

data frames for 4.4

parity bits for 4.4

start bits for 4.4

stop bits for 4.4

baud rate 4

duplex 4.4

full-duplex 4.4

half-duplex 4.4

modes 4.4

parallel 4.4

skew in 4.4

parity bits for 4

protocols 4.5

serial 4.4

simplex 4.4

standards 4.4, 4.5

CAN 4.5

M-LVDS 4.5

RS-232 4.5

RS-422 4.5

RS-485 4.5

RS-644/LVDS 4.5

serial peripheral interface (SPI) 4.5

stop bits for 4

synchronous 4.4

universal asynchronous receiver/transmitters (UARTs) 4

Digital control systems 2.8, 8.4

applied to DC motors 8.5

emulation design of 8.4

roughness 8.4

sample period 8.4

sample rate 8.4

smoothness 8.4

time delays 8.4

Digital demodulation 4.1

Digital information 4.1

Digital input/output (DIO) 4.3

digital input (DI) 4.3

floating 4.3

high-\(Z\) 4.3

high-Z 4

pulldown resistors for 4.3

pullup resistors for 4.3

three-state logic for 4.3

digital output (DO) 4.3, 6.6

open-collector 4.3, 6.6

open-drain 4.3, 6.6

pulldown resistors for 6.6

pullup resistors for 6.6

push-pull 4.3, 6.6

Digital interrupts 6

Digital modulation 4.1

Digital signal processing (DSP) 2.8

Digital signals 4, 4.2

logic families for 4.2

complementary metal-oxide-semiconductor (CMOS) 4.2

transistor-transistor (TTL) 4.2

logic levels for 4.2

noise immunity 4.2

noise margins 4.2

random 4.1

symbols of 4.1

Digital-to-analog conversion 7.1, 7.2, 7.5, 7, 8.4, 8, 9

R-2R DAC 7.2

DIIRQ.h 6.4

DIO 4.10

DIO.h 4.10, 4, 5

Dio_ReadBit() 4.10, 4

Dio_WriteBit() 4.10, 4

Diodes

flyback 5.3

suppression 5.3

Discrete quantities 4.2

Discrete signals 7

Discrete-time systems 7.4

direct design 7.4

Tustin's method 7.4

Discretization 8.6

do 1.5

Dominant poles 8.1, 8.6

double 1.5, 1, 2.10, 3.3

double_in() 1, 2.9, 2.11, 2, 3.5, 3

DWN 3

E

Eclipse integrated development environment (IDE) 1.2, 1

Editing a buffer 3

Efficiency 3

algorithmic 3, 3.2

memory 3, 3.3

premature optimization and 3.1

programmatic 3, 3.3

benchmarks for 3.3

bottlenecks limiting 3.3

buffers for 3.3

comparing 3.3

maintainability and 3.3

memory leaks spoiling 3.3

number representation and 3.3

profilers for 3.3

readability and 3.3

tick-tock paradigm of 3.3

resource minimization via 3.1

run time 3

Embedded computers 2.2

Embedded computing 3.1

efficient types for 3.3

real-time 3.1

Emulator 7, 8

Encoder.h 5.4, 5

Encoder_Configure() 5.4

Encoder_Counter() 5.4, 5

EncoderC_initialize() 5

Encoders 5.4, 8.5

absolute 5.4

Gray code for 5.4

angular resolution of 5.4

basic displacement increment (BDI) of 5.4

basic time interval (BTI) 5.4

counts per revolution (CPR) 5.4

processing signals from 5.4

quadrature 5.4, 5, 8

modeled as FSMs 5

rotary 5.4

speed measurement with 5.4

states for 5.4

Endianness 2.3

ENT 3

enum 1.5, 3.3

EOF 3

Escape sequences 2, 4

Executable files 1.4

EXIT_SUCCESS 1.5, 1

extern 3.3

External physical variables 7

F

fclose() 3.3

Feedback transfer function 8.2

fflush() 3.3

fgets_keypad() 2.11, 2, 3.5, 3

Field-programmable gate array (FPGA) 1.1, 8

Field-programmable gate arrays (FPGAs) 2.2

FILE 3.3

Filter 7, 8.4

Butterworth filter 7

Finite state machines (FSMs) 5, 5.5, 5, 5

Mealy machines 5.5

modeling FSMs 5

Moore machines 5.5

programming 5.5, 5

state transition diagrams 5.5, 5, 5

state transition tables 5.5, 5

state transitions 5.5

states 5.5

float 1.5, 2.10, 3.3

Floating-point numbers 2.5

Flyback diodes 5.3

fopen() 3.3

for 1.5

Forward transfer function 8.2

Fourier

fast-Fourier transform (FFT) 2.8

Fourier series 5.3, 5

Fourier transform 7.3

FPGA session 1

fputc() 3.3

fputs() 3.3

Frequency-shift keying (FSK) 4.1

function generator, fgset() 7

G

Gain crossover frequency 9.5

Gain margin 9.5

getchar_keypad() 3.5, 3

getkey() 3.5, 3, 4, 7

gh auth C

gh repo C

Git 1.3, C, C

Git Bash C

setting up a workspace C

git add C

git commit C

git config C

git init C

git pull C

git push C

git status C

GitHub C

H

Hypervisor 1.2

I

if 1.5

Information theory 4.1

inline functions 3.3

Input 2.2

Input/output (I/O) 2.1, 6.1

communication systems 4

inputs of 2.1

outputs of 2.1

peripheral devices for 4

sensor 2.1

threads and 6.4

Insertion sort algorithm 3.2

Instruction set architectures 2.1, 6.1

ARM 2.1, 2.3

complex (CISC) 2.1

reduced (RISC) 2.1

x86 2.1

Instructions 1.4, 2.1, 2.3, 2.5, 2.6

executing 2.3

fetching 2.3

translating 2.3

int 1.5, 1, 3.3

int_fastX_t 3.3

int_leastX_t 3.3

Integer arithmetic 5.4

Integral compensation 8.3, 8.6

Integrated circuits 2.2

Integrated development environment 1.2

Integrators 8.3

interactive_add() 1

Interpreter 1.4

Interrupt thread 6

Interrupts 6.2, 6.4, 6, 7.6, 8, 9

controller of 6.4

periodic 7.6

real-time versus conventional handling 6.4

requests for (IRQs) 6.4, 6

resources 7.6

service routines for (ISRs) 6.4, 6, 8.4

Interrupts for the target system

digital input (DI) 6.4

interrupt service routines (ISRs) for 6.4

timer 7.6

intX_t 3.3

Irq_Channel 7.6

Irq_RegisterDiIrq() 6.4, 6

Irq_RegisterTimerIrq() 7.6

Irq_UnregisterDiIrq() 6

Irq_UnregisterTimerIrq() 7.6

Irq_Wait() 6.4, 6, 7.6

IRQConfigure.h 6.4

irqNumber 6

IRQTIMERSETTIME 7.6, 8

IRQTIMERWRITE 7.6, 8

J

Jacksons rule 3.2

K

Key code lookup table 4

Keypad 1, 2

Kickback 5.3

L

Laplace domain 8.1

Laplace transform 7.4

Latency 1.1

Layers of communication 4.1

LCD 1, 2

Least significant bit (LSB) 7.2

Library object files 1.4

Linking 1.4, 6.1

Little-endian 2.3

Loading 1.4

Logic

operators 6.5

symbolic propositional 6.5

truth tables 6.5

truth values 6.5

Logic gates 6.5

long 1.5

Long float format 2

long int 3.3

M

Machine language 1.4, 2.1

Magnitude criterion 8.2

main 1.5, 1

math.h 1.5, 3.3

matlabfiles.h 5

Measurement 2.8

memcpy() 2.10

Memory 1.4, 2.5, 6.1

addresses 1.4, 2.1, 2.3, 2.5, 2.6

big-endian convention for 2.5

bits 2.1, 2.5

bytes 2.1, 2.5

cache 2.1

contents 1.4, 2.5

digital circuits and 6.5

dynamic random access memory (DRAM) 2.2

electrically erasable programmable read-only memory (EEPROM) 2.2

erasable programmable read-only memory (EPROM) 2.2

flash 2.2

hard disk drive (HDD) 2.1, 2.2

least significant bit (LSB) 7.2

least significant byte 2.5

little-endian convention for 2.5

main 2.1, 2.2

most significant bit (MSB) 7.2

most significant byte 2.5

multibyte numbers 2.5

nibbles 2.1, 2.5

nonspecificity of contents of 2.5

nonvolatile 2.1

organization 2.5

programmable read-only memory (PROM) 2.2

random-access (RAM) or read/write 2.2

read-only 2.2

read-only memory (ROM) 2.2

realization 2.2

secondary 2.1, 2.2

solid-state drive (SSD) 2.1, 2.2

static random access memory (SRAM) 2.2

volatile 2.1

merge conflicts C

Microcontrollers 2.2

Minsky Marvin 4.1

Mod function

offset 5.4

Modems 4.1

Modular arithmetic 2.4

Modulo operator 1.5, 1

Most significant bit (MSB) 7.2

Motors

driving 5.3

models of 5.1

current source 5.1, 5, 8.5, 8.6

voltage source 5.1, 5, 8.5

position control of 9

velocity control of 8.5, 8

myRIO C library 1.6

MyRio.h 1.6, 1, 5

MyRio1900.h 1.6

MyRio_Close() 1.6, 1

MyRio_Dio 4.10, 4

MyRio_Encoder 5.4

MyRio_IrqDi 6.4, 6

MyRio_IrqTimer 7.6

MyRio_IsNotSuccess() 1.6, 1

MyRio_Open() 1.6, 1

MyRIO_Uart 4.9

MyRio_Uart 4

N

NAND gate 6

Natural frequency 8.1

Nibbles 2.1

NiFpga.h 1.6

NiFpga_Bool 1.6, 6, 7.6

NiFpga_False 1.6, 7.6

NiFpga_IrqContext 6.4, 6, 7.6

NiFpga_Session 5, 6

NiFpga_Status 1.6, 1

NiFpga_Status_Success 1.6

NiFpga_True 1.6, 7.6

NiFpga_WriteBool() 7.6

NiFpga_WriteU32() 7.6

Numeral systems 2.4

binary (base-2) 2.4

signed 2.4

complements of 2.4

diminished 2.4

converting among 2.4

decimal (base-10) 2.4

hexadecimal (base-16) 2.4

signed 2.4

method of complements for 2.4

positional 2.4

signed 2.4

Nyquist frequency 7.3

Nyquist-Shannon sampling theorem 7.3, 8.4

O

Object files 1.4

Opcodes 1.4, 2.6

binary representation of 2.6

mnemonics of 2.6

Open-collector digital outputs (DOs) 4.3

Open-drain digital outputs (DOs) 4.3

Open-loop control 5, 5.2

Open-loop transfer function 8.2

Operating systems 2.3

context switching 6.1

conventional 6.1

data for a program 6.1

kernels of 6.1

portable operating system interface (POSIX) standards 6.1, 6.3

processes of 6.1

processor state (context) of 6.1

program counters of 6.1

threads 6.1

tasks and 6.1

Operational amplifiers (op-amps) 5.3

power 5.3

Oscilloscope 7

Output 2.2

Overflow 2.4, 5.4

Overshoot 8.1

P

Paper computer 2.6

Path planning 9.6

Peak time 8.1

Periodic sampling 7.3

Peripheral devices 4

Phase criterion 8.2

Phase margin 8.4, 9.5

pidtune() 9.5, 9, 9

pidtuneOptions() 9.5, 9

Pointers 7

pointers 2.10

pos() 9

Power electronics 5.3

Power sinking 5.3

Power supplies 5.3

PREEMPT_RT 6.3

Premature optimization 3.1

printf() 1.5, 2.11

printf_lcd() 2.9, 2.11, 2, 3.5, 3

Processes 2.3, 6.1

Processor independence 1.4

Processors 2.6, 6.1

addressing modes 2.3

buses 2.1

cache misses 6.1

clock cycles 5

clock frequency 5

context switching 6.1

control units of 2.1

cores of 2.2, 6.1

datapaths of 2.1

realizing 2.2

registers 2.1

simultaneous multithreading (SMT) 6.1

stalls in 6.1

threads 6.1

tasks and 6.1

Program counters (PCs) 2.6, 6.1

Programming languages 1.4

Programming models 2.3

Programs 1.4

Proportional control 8.2

Proportional-integral (PI) control 8.3, 8.4, 8.5, 8.6, 8

Proportional-integral-derivative (PID) control 9.2, 9.6, 9, 9

PIDF variant of 9.4

Pseudocode 1, 2

pthread.h 6.3

pthread_attr_t 6.3

pthread_create() 6.3, 6.4, 6, 7.6

pthread_exit() 6.3

pthread_join() 6.3, 6.4, 6

pthread_t 6.3, 6, 7.6

Pulldown resistors 4.3

output stages and 6.6

Pullup resistors 4.3, 4

output stages and 6.6

Pulse-width modulation (PWM) 8.5

Push-pull digital outputs 4.3

putchar_lcd() 2.11, 2, 3.5, 3, 4

Q

Quadrature encoder 8

Quantization 7.1

R

R-2R DAC 7.2

Radix points 2.4

Random-access machines 3.2

Real-time computer modeling 2.7

Real-time operating systems 2.7, 6.1

Real-Time Linux 1.1, 6.3

application programming interface (API) 6.3

Real-time scheduling 3.2, 6.2

deadlines 2.7

precedence relations 2.7

Real-time systems 2.7

design of 2.9

client problems for 2.9

objectives for 2.9

requirements for 2.9

embedded 3.1

fault tolerance 2.7

predictability 2.7

Real-time tasks

active (ready) 6.2

critical sections of 6.2

deadlines

firm 2.7

hard 2.7, 2.8

soft 2.7

dispatching 6.2

interruption of 6.2

latencies of 6.2

lateness of 3.2

precedence constraints of 6.2

preemption of 6.2

priorities of 6.2

qualities 2.7

aperiodic 2.7, 3.1

periodic 2.7, 3.1

queue of 6.2

resource constraints of 6.2

mutually exclusive 6.2

private 6.2

shared 6.2

run time 3

running (executing) 6.2

scheduling 2.7, 3.2, 6.2

algorithms for 6.2

blocking in 6.2

context switching for 6.2

deadlines 2.7

mutexes for 6.2

nonpreemptive protocols for 6.2

precedence relations 2.7

priority inheritance protocols for 6.2

priority inversion in 6.2

ready state in 6.2

semaphores for 6.2

signaling readiness when 6.2

synchronization 6.2

waiting state in 6.2

time constraints of 6.2

Register interrupt 6

registering 6.4

Registers 2.1, 2.3, 2.6

ARM, application status (application program status register, APSR) 2.3

ARM, execution state 2.3

ARM, general-purpose 2.3

ARM, special-purpose 2.3

program counter (\mintinline{text}{PC}) 2.3

return link (\mintinline{text}{LR}) 2.3

stack pointer (\mintinline{text}{SP}) 2.3

ARM, vector floating-point extension 2.3

remote repository C

repository C

Resource minimization 3.1

return 1

Rise time 8.1, 8.4

rlocus() 8.3, 8.4, 8.6

Robustness 8.1

Root locus 8.1, 8.3, 8.4, 8.5, 8.6

Roughness 8.4

Run time 3

S

Sample period 8.4

Sample rate 2.8, 8.4

Sample-and-hold circuit 7.1, 7.2

Sampled signal transform 7.3

Sampling 7.1, 7.3

Sampling frequency 7.3

sched.h 6.3

sched_attr 6.3

sched_setattr() 6.3

Sensors 2.8

DC gain of 8.1

Settling time 8.1

Shannon Claude 4.1

Shift registers 4.6

short 1.5

signed 3.3

Simultaneous multithreading (SMT) 6.1

Single-board computers 2.2

Single-input, single-output (SISO) systems 2.8

sizeof() 2.10

Skew in digital communication 4.4

Smoothness 8.4

sos2header() 9

Source decoding 4.1

Source encoding 4.1

sprintf() 1

Sramps() 9

sscanf() 2

Stability 8.1, 8

Stack pointers (\mintinline{text}{SP}s) 2.3

staging area C

Stalls 6.1

States

finite state machine (FSM) 5.5

static 3.3

stdarg.h 2.10

stdint.h 3.3

stdio.h 1, 2.10, 3.3, 5

stdlib.h 1

Steady state error 8.3

Steady-state error 8.1

step() 8.3, 8.4, 8.6, 9.5

strchr() 2

string.h 2

strings 2.10

strpbrk() 2

strrchr() 2

Successive approximation register (SAR) ADC 7.2

Suppression diodes 5.3

switch 1.5

Switches, mechanical 6.7

categories of 6.7

contact of 6.7

mounting of 6.7

mounting of, DIP 6.7

mounting of, SMT 6.7

poles of 6.7

throws of 6.7

transition of 6.7

debouncing 6.8

nand 6.8

relay 6.7

System on a chip (SoC) 2.2

System type 8.3

System-level programming 2.3

Systems software 6.1

T

T1 C library 1.7

user interface functions 2.11, 3.5

call graph 2.11

T1.h 1, 5

Target computer

architecture 2.2

connectors (A, B, C) 4.7

encoder inputs 5.4

configuration of and status registers for 5.4

encoder counters of 5

field-programmable gate array (FPGA) 2.2, 4.7

input/output (I/O) communication channels 4.7

analog input/output (AIO) 4.7

digital input/output (DIO) 4.7

serial peripheral interface (SPI) 4.7

universal asynchronous receiver/transmitter (UART) 4.7, 4

power output 4.7

Target system 1.1

computer 1.1

field-programmable gate array (FPGA) 1.6, 4.7

input/output (I/O) 1.6, 4.7

design of the 2.9

position control 5, 9

requirements for 2.9, 5, 8, 9

user interface 2.11, 3.5

velocity control 8

electromechanical subsystem 1.1

amplifier 1.1, 5

encoder 5

motor 1.1, 5

motor modeling 5.1

position control of the 9.5

prototyping and testing hardware 1.1

user interface subsystem 1.1

display 1.1

functions 2.11, 3.5

keypad 1.1

keypad switch array 4

operational diagram 2.11

velocity control of 8.6

Tasks 2.3

terminating 6.4

tf() 7.4, 8.3, 9

tf2sos() 7.4, 7, 9

tfdata() 7.4, 9

ThreadResource 6.4, 6, 7.6

Threads 2.3, 6.1, 7.6

resources 6, 7.6

tasks and 6.1

Time delays 8.4

time.h 3.3, 6.3

Timer interrupts 7.6

interrupt request (IRQ) 7.6

interrupt service routine (ISR) 7.6

interrupt thread 7.6

main thread 7.6

TIMERIRQNO 7.6

Torvalds Linus 6.3

Transient response 8.1

Transistor-transistor (TTL) logic family 4.2, 6.6

Transistors 2.7

bipolar junction transistors (BJTs) 5.3, 6.6

active region 6.6

base \(B\) 6.6

collector \(C\) 6.6

cutoff region 6.6

emitter \(E\) 6.6

model 6.6

npn 6.6

pnp 6.6

digital circuits and 6.6

metal-oxide-semiconductor field-effect transistors (MOSFETs) 5.3, 6.6

cutoff region 6.6

drain 6.6

gate 6.6

model 6.6

n-channel 6.6

p-channel 6.6

saturation region 6.6

source 6.6

threshold voltage 6.6

triode region 6.6

switched amplifiers with 5.3

Tustins method@Tustin's method 7.4, 8.4, 8.6

typedef 1.5, 1.6

U

UART.h 4.9, 4

Uart_Clear() 4.9

Uart_Close() 4.9

Uart_Open() 4.9, 4

Uart_Parity 4.9

Uart_Read() 4.9

Uart_StopBits 4.9

Uart_Write() 4.9, 4

uint8_t 3.3

Ultimate Machine 4.1

Unbuffered getchar() 3

universal asynchronous receiver/transmitters (UARTs) 4.9

Unregister interrupt 6

unsigned 3.3

UP 3

V

va_arg() 2.10

va_copy() 2.10

va_end() 2.10

va_list 2.10

va_start() 2.10

vel() 5, 8

Version control 1.3, C

visa.h 4.9

visatype.h 4.9

vsnprintf() 2

W

wait() 4, 5.6, 5, 6

Wait-based timing 5, 5.6, 6

while 1.5, 1

working tree C

Z

Z-transform 7.4

discrete transfer function 7.4

Ziegler-Nichols proportional-integral-derivative (PID) tuning method 9.5