I/O communication channels for the myRIO

The myRIO connectors

The A and B connectors, called “MXP” connectors, have identical pinouts, shown in . Some pins have a primary and a secondary signal, which can be configured programmatically. In addition to communication pins, there are power and ground lines.

The “MSP” C connector has pinouts shown in . Some of these lines are somewhat different than those of the MXP connectors. We will now consider lines by functional category.

Power output

Strictly speaking, the power output lines are not for communication, but they are worth considering briefly. There is a \(5\)-V power supply line on each of the A, B, and C connectors. Each references the respective DGND ground line (i.e., it is \(5\) V with respect to DGND). The specification guarantees that the output will be \(5 \pm 0.25\) V with a maximum current draw of \(100\) mA (per connector). The A and B connectors also have a similar DGND-referenced \(3.3 \pm 0.3\) V output, with a maximum current draw of \(150\) mA. These power output lines are convenient for powering (especially digital) sensors and other low-power peripheral devices.

The C connector has differential power output lines at \(\pm 15\) V, with respect to the analog ground AGND. The combined power these can supply is \(500\) mW. The differential supply is convenient for powering analog sensors. Resist the temptation to use the output power lines for loads that exceed the power rating.

Analog input and output

Analog input (AI) and analog output (AO) lines are present on all three connectors. The A and B connector analog input/output (AIO) lines are nominally \([0,5]\) V with respect to ground AGND. The C connector has two differential AIs in the nominal range \([-10,+10]\) V and two AOs in the same range, \([-10,+10]\) V. AIs and AOs are subject to processes called analog-to-digital conversion and digital-to-analog conversion, which we will discuss extensively in chapter 6. Therefore, we will wait to consider other AIO specifications such as resolution, dynamic range, and bandwidth.

The primary use of analog inputs is the measurement of analog voltage signals, usually from sensors. Analog outputs can be used to control amplifiers that drive motors and other actuators, as we will see in chapter 4.

Digital input and output

There are multiple DIO pins on each connector, all of which have the reference DGND. Each can be programmed to be either an input or an output. All outputs are of the \(3.3\) V LVTTL logic family,² which is generally compatible with \(3.3\) V CMOS logic families. All inputs are also of the \(3.3\) V LVTTL logic family, but they are also compatible with a \(5\)-V logic level. On connectors A and B, DIO lines 0–13 each has a \(40\)-k\(\Omega\) pullup resistor to \(3.3\) V, and lines 14 and 15 each has a \(2.1\)-k\(\Omega\) pullup resistor to \(3.3\) V. The C connector DIO lines each has a pulldown resistor of \(40\) k\(\Omega\) to ground DGND.

When a DIO line is configured as an input (DI), it is in high-\(Z\) mode and its voltage floats toward its pull resistor. For the A and B connector DI lines, the voltage floats toward the \(3.3\)-V level, and the C connector DI lines float toward ground. This means when a DI is connected to an open circuit (i.e., it is disconnected), it will read high (connectors A and B) or low (connector C). Some DIO lines have secondary uses. Some can be configured for UART, SPI, and \(\text{I}^2\text{C}\) communication lines, as we discuss next. Others can be used for pulse-width modulation (PWM) and encoder sensors, both of which are discussed in chapter 4.

UART lines

The myRIO target computer has two configurable UART interfaces, one of which will be used in lab 3 to transmit data to the display. There is a UART on each of the MXP connectors, A and B. The UART input pin on each connector is pin 10 and the output is pin 14 (see ).

The output pins use the popular \(3.3\) V LVTTL logic level, which is compatible with \(3.3\) V CMOS. The \(3.3\) V LVTTL input pins are compatible with \(5\)-V logic levels. These specifications allow us to directly connect most peripheral devices that can receive \(3.3\)-V logic levels and those that transmit \(3.3\) V or \(5\) V. The input and output UART lines have \(40\) k\(\Omega\) pullup resistors to \(3.3\) V. The UART lines have configurable baud rates of up to \(230.4\) kbps.

SPI and \(\text{I}^2\text{C}\) lines

The A and B connectors each have an SPI and an \(\text{I}^2\text{C}\) bus, with three pins for SPI and two for \(\text{I}^2\text{C}\). The SPI interface has only PISO (SPI.MOSI), POSI (SPI.MISO), and clock (SPI.CLK) pins, making it a three-wire variant of standard SPI that lacks the chip select (CS) pin for multiple-peripheral control by the myRIO. Therefore, only two SPI devices can be easily connected, one on each connector. The maximum frequency for the SPI is \(4\) MHz. The \(\text{I}^2\text{C}\) interface is a standard two-wire bus with data line I2C.SDA and clock I2C.SCL.